1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device including an internal power generating circuit and a circuit operating on an internal voltage generated in the internal power generating circuit on the basis of an applied external voltage.
2. Description of the Related Art
Japanese Patent Laid-Open No. H9 (1997)-153777 discloses a power-on reset signal generating circuit POR operated on a voltage IntVdd, which an internal voltage generating circuit 4 generates. If a power-on reset signal generated by the power-on reset signal generating circuit POR is input to an internal circuit 3, the internal circuit 3 is reset. Therefore, it is possible to stop the operation of the circuit in an abnormal state when power is applied.
Japanese Patent Laid-Open No. H7 (1995)-159846 relates to a power supply system of a camera and discloses a mechanism which resets a logic circuit 4. Power VCC generated by a DC/DC converter 2 is supplied to the logic circuit 4. The logic circuit 4 receives a reset clear signal generated by a logic reset circuit 3 and starts an operation. In the mechanism of Japanese Patent Laid-Open No. 7 (1995)-159846, the DC/DC converter 2 is controlled by a CPU 5 which is already operating (that is, which does not generate an indefinite value).